LCOV - code coverage report

Current view: top level - ugbase/lib_algebra/operator - convergence_check.h (source / functions) Coverage Total Hit Test: coverage.info Lines: 0.0 % 26 0 Test Date: 2025-09-21 23:31:46 Functions: 0.0 % 57 0

Function Name	Hit count
_ZN2ug12StdConvCheckINS_6VectorIdEEE10set_offsetEi	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE10set_offsetEi	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE10set_offsetEi	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE10set_offsetEi	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE10set_symbolEc	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE10set_symbolEc	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE10set_symbolEc	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE10set_symbolEc	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE11set_verboseEb	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE11set_verboseEb	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE11set_verboseEb	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE11set_verboseEb	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE13set_reductionEd	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE13set_reductionEd	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE13set_reductionEd	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE13set_reductionEd	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE17set_maximum_stepsEi	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE17set_maximum_stepsEi	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE17set_maximum_stepsEi	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE17set_maximum_stepsEi	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE18set_minimum_defectEd	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE18set_minimum_defectEd	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE18set_minimum_defectEd	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE18set_minimum_defectEd	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE24set_supress_unsuccessfulEb	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE24set_supress_unsuccessfulEb	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE24set_supress_unsuccessfulEb	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE24set_supress_unsuccessfulEb	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE5cloneEv	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE5cloneEv	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE5cloneEv	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE5cloneEv	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE8set_infoENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE8set_infoENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE8set_infoENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE8set_infoENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE8set_nameENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE8set_nameENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE8set_nameENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN2ug12StdConvCheckINS_6VectorIdEEE8set_nameENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE10get_defectEm	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE10get_defectEm	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE10get_defectEm	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE10get_defectEm	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE10get_offsetEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE10get_offsetEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE10get_offsetEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE10get_offsetEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE13config_stringB5cxx11Ev	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE13config_stringB5cxx11Ev	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE13config_stringB5cxx11Ev	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE13config_stringB5cxx11Ev	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE15previous_defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE15previous_defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE15previous_defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE15previous_defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE4rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE4rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE4rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE4rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE4stepEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE4stepEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE4stepEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE4stepEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE6defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE6defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE6defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE6defectEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE8avg_rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE8avg_rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE8avg_rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE8avg_rateEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE9reductionEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm2EEEEEEEE9reductionEv	0
_ZNK2ug12StdConvCheckINS_6VectorINS_11DenseVectorINS_11FixedArray1IdLm3EEEEEEEE9reductionEv	0
_ZNK2ug12StdConvCheckINS_6VectorIdEEE9reductionEv	0

Generated by: LCOV version 2.0-1